       NAM     SUMTEST2
*      OPT     O       
*IMPROVED MEMORY TEST FOR SWTPC 6800
*BYTES STORED IN MEMORY ARE THE SUM OF THE
*MSB AND LSB OF THE MEMORY POINTER, THEREFORE
*ADJACENT MEMORY LOCATIONS AND ADJACENT
*PAGES CONTAIN UNIQUE CONTENTS
*INITIALIZE LOWEST MEMORY ADDRESS IN LOTEMP
*AND HIGHEST MEMORY ADDRESS+1 IN HITEMP
*MODIFIED FOR MIKBUG OR SWTBUG

       ORG     $A002
LOTEMP RMB     2
HITEMP RMB     2
PDATA1 EQU     $E07E
OUTEEE EQU     $E1D1
OUT2HS EQU     $E0CA
OUT4HS EQU     $E0C8
MCL    EQU     $E19D

       ORG     $A014
CTR    FCB     0       PASS COUNTER
STORE  FCB     0       BIT MISMATCHED
INXMSB FCB     0
INXLSB FCB     0
START  LDX     LOTEMP
LOOP1  BSR     INCRX   INCREMENT INDEX
       STA A   0,X
       INX
       CPX     HITEMP  END OF MEMORY?
       BNE     LOOP1
       LDX     LOTEMP
LOOP2  BSR     INCRX
       EOR A   0,X
       BNE     ERROR
RETURN INX
       CPX     HITEMP
       BRA     SKIP1   BRANCH AROUND HOLE

       ORG     $A048
       FDB     START
SKIP1  BNE     LOOP2
       LDA A   #$2B
       JSR     OUTEEE
       INC     CTR
       BRA     START
INCRX  STX     INXMSB
       LDA A   INXMSB
       ADD A   INXLSB  ADD IN ADDR LSB
       ADD A   CTR     ADD IN COUNTER
       RTS
ERROR  STA A   STORE   STORE ERRANT BIT
       LDX     #MCL
       JSR     PDATA1  DO C/R L/F
       LDX     #CTR
       JSR     OUT2HS  COUNTER, IN HEX
       JSR     OUT2HS  ERRANT BITS, IN HEX
       JSR     OUT4HS  ADDRESS, IN HEX
       LDX     INXMSB
       BRA     RETURN
       END