;Dual CPU Kill-the-Bit Slave

;---------------
;88-2SIO Equates
;---------------
; 88-2SIO registers

SIOBAS	equ	10h
S2CTLA	EQU	SIOBAS		;ACIA A control output port
S2STAA	EQU	SIOBAS		;ACIA A status input port
S2TXDA	EQU	SIOBAS+1	;ACIA A Tx data register
S2RXDA	EQU	SIOBAS+1	;ACIA A Rx data register
S2CTLB	EQU	SIOBAS+2	;ACIA B control output port
S2STAB	EQU	SIOBAS+2	;ACIA B status input port
S2TXDB	EQU	SIOBAS+3	;ACIA B Tx data register
S2RXDB	EQU	SIOBAS+3	;ACIA B Rx data register

; CONTROL REGISTER BITS

ACCDS1	EQU	00000001B	;COUNTER DIVIDE SELECT 1
ACCDS2	EQU	00000010B	;COUNTER DIVIDE SELECT 2
ACWS1	EQU	00000100B	;WORD SELECT 1
ACWS2	EQU	00001000B	;WORD SELECT 2
ACWS3	EQU	00010000B	;WORD SELECT 3
ACTC1	EQU	00100000B	;TRANSMIT CONTROL 1
ACTC2	EQU	01000000B	;TRANSMIT CONTROL 2
ACRXIE	EQU	10000000B	;RECEIVE INTERRRUPT ENABLE

ACRSET	EQU	00000011B	;MASTER RESET
AC0INIT	EQU	ACCDS1+ACWS3	;/16 CLOCK, 8 BITS+2 STOP BITS

; STATUS REGISTER BITS

ASRDRF	EQU	00000001B	;RECEIVE DATA REGISTER FULL
ASTDRE	EQU	00000010B	;TRANSMIT DATA REGISTER EMPTY
ASDCD	EQU	00000100B	;DATA CARRIER DETECT
ASCTS	EQU	00001000B	;CLEAR TO SEND
ASFE	EQU	00010000B	;FRAMING ERROR
ASOVRN	EQU	00100000B	;RECEIVER OVERRUN ERROR
ASPE	EQU	01000000B	;PARITY ERROR
ASIRQ	EQU	10000000B	;INTERRUPT REQUEST

	org	0

	mvi	a,ACRSET		;reset 2SIO
	out	S2CTLA

	mvi	a,AC0INIT	;8 data bits, etc.
	out	S2CTLA

	lxi	d,0		;initialize bit (none yet)
	in	S2RXDA		;flush the serial port

;Wait for master while displaying pattern

RXWAIT:	ldax	d		;display on upper address lights
	ldax	d
	in	S2STAA
	rar			;LSB clear means nothing waiting
	ldax	d
	ldax	d
	jnc	RXWAIT

	in	0FFh		;read front panel
	xra	d		;combine
	mov	d,a		;temp save

	in	S2RXDA		;lsb is new bit
	rar			;lsb to carry
	mov	a,d		;bit pattern
	ral			;rotate pattern, with new bit
	mov	d,a		;..and old top bit goes into carry

	mvi	a,'0'		;create response
	aci	0		;catch carry

	out	S2TXDA		;no need to wait for the port

	jmp	RXWAIT

	end